1. Field of the Invention
The present invention relates to the field of semiconductor devices and their manufacture. More particularly, the present invention provides an improved method and apparatus for annealing semiconductor wafers.
2. Description of Related Art
It is well known that control of minority carrier lifetime is important in integrated circuits such as high frequency silicon power devices. In the past, gold, platinum, or other impurities have been used to introduce recombination centers in a device so as to reduce minority carrier lifetimes.
It has been recognized that high energy electrons can also be used to control minority carrier lifetimes. High energy electrons may be introduced into a device, displacing silicon atoms or the like from their normal lattice positions. The displaced atoms interact with the silicon or dopant atoms to form combinations of atoms having energy levels between the normal conduction and valence bands of silicon. These energy levels act as recombination centers, much like the recombination centers that would be formed by gold or platinum atoms.
Electrons introduced into devices to induce such defects have been described as having energies from, for example, 0.8 to 12 MeV. Electrons of these energies may be produced using various types of electron accelerator devices, such as a transformer accelerator, a Van de Graff accelerator or, in the extreme, a linear accelerator.
Improved device characteristics are achieved using electron irradiation due to reduced minority carrier lifetimes. However, in order for the device to function properly, at least a portion of the damaged active area must be annealed. Annealing of electron irradiation induced damage has been performed using conventional oven or furnace baking techniques. The annealing process must be carefully controlled in order to produce acceptable device characteristics. For example, V.sub.CESAT (the voltage drop across an "on-state" switch) and V.sub.th (threshold voltage) must be carefully controlled and optimized in order to produce a fast device. Further, the annealing step must be carried out under conditions which do not have other adverse consequences on the device. For example, the anneal must be carried out at temperatures below the melting point of aluminum since electron irradiation and subsequent annealing are often carried out on a completed semiconductor wafer or device. Present annealing processes for electron irradiation induced damage do not provide sufficient control over the parameters which impact semiconductor performance and produce devices with undesirable characteristics. Electron irradiation, oven annealing, and their effect on device characteristics are discussed in, for example, Carlsen et al., "Lifetime Control in Si Power Devices", IEEE Transactions in Power Devices. Vol. 29, No. 8, page 1163 (Aug. 1977). Patents related to the field of electron irradiation induced damage of semiconductors include U.S. Pat. No. 4,201,598 (Tanaka et al.) which discloses electron-irradiation followed by conventional annealing.
It is desirable to provide a process and an apparatus for partially annealing elect-ron or gamma ray damaged devices so that D.C. electrical properties such as V.sub.CESAT and V.sub.th may be controlled and optimized while, simultaneously, not substantially increasing minority carrier lifetimes.